The Jim Austin Computer Collection

AMT DAP 500

This is an AMT DAP, a Distributed Array Processor. This is an array of 32x32 bit processors, giving a performance of:

• Transfer rate between memory and processors of 1200 MBytes/sec.
• Ability to undertake Boolean operations at 10,000 million operations/sec (MOPS).
• Character handling ability of a 1000 million/sec.
• Integer arithmetic at 60-400 MOPS in 8-bit precision or 30-200 MOPS in 16-bit precision.
• 32-bit floating point operation in the range 6-60 MFLOPS.

This shot shows the DAP processor chip, I think...

Which is quite some thing for 1998. It was agift from Maurice Miller, Cambridge Parallel Processing in 1998. It runs, but needs a host machine and software to work.

A DAP card:

The other side:

The machine is serial number 10005, so I guess thats early.

Some history....

DAP (AMT)
" Work on the Distributed Array Processor (DAP) begin at ICL in the UK in 1972. Stewart Reddaway’s
design, which closely resembled SOLOMON, was for a 6464 array of single bit processors, each with
4 kbit memory in which both program and data were stored. The first machine was commissioned in
1976, and the first productionmodel was installed at QueenMary College London, in 1980. The machine
occupied a volume of 250 ft , weighed 2 ton, required 20 kW of three-phase electricity, air cooling
and purification facilities. The DAP’s commercial success was limited due to its reliance on an ICL
mainframe as a front end. Only 6 machines were placed, all in the UK.
In 1980, as the DAP became commercially available, research started on SuperDAP. Several iterations of
design led to a machine based on 4-bit PEs which delivered 10–100 times the original DAP performance
on arithmetic. By the early 1980s, the superDAP had been shelved in favour of miniDAP, an LSI DAP
targetted at the scientific workstation and signal processing markets. The miniDAP was a 3232 grid
of PEs, with 16 PEs per processor chip. It was hosted by a PERQ workstation running ICL’s Unix
implementation. In 1985 the first miniDAP delivered to the Royal Signals and Radar Establishment
(RSRE), Malvern. The first commercial prototype followed in 1986. Only 13 miniDAPs were made.
In 1986, ICL took the decision to spin off the DAP as a separate venture, and formed Active Memory
Technology (AMT). ICL believed that it would be easier to enter the US market through a company with
a US production base, and that there was greater expertise in chip design in the US, which would allow
advances in processor technology to be implemented more quickly than in the UK. ICL was unable to
develop strong US links itself, and so AMT was formed, with ICL retaining a 20% share in AMT in
return for technology transfer. AMT’s hardware and production activities were in the US, with software
and top management in the UK.
1987 saw the first commercial deliveries of the AMT DAP 500, a 3232 array of single-bit processors,
based on a 64-PE custom VLSI chip. Each PE has at least 32 kbit memory. The new DAP was small
enough to fit under a desk, ran from normal mains electricity, requiring 300-400 W, and did not need
special cooling or air purification facilities. The 600 series DAP became available in 1988.
In November 1989, Geoff Manning became CEO and unified corporate structure by moving the top
management to the US, where the majority of sales were being made. AMT is currently capitalised at
£15M with £10Mfrom UK venture capitalists.
In 1990, AMT announced a coprocessor — the CP8 — which enhanced the floating point and integer
performance of the DAP.
A DAP’s model number is the base 2 logarithmof the edge size of the array, followed by the clock speed
inMHz and, if the PEs have an attached coprocessor, the letter c. Hence a DAP 610c is a 6464 procesor
machine with an attached coprocessor, running at 10 MHz."

From An Overview of SIMD Parallel Systems AMT DAP, Thinking Machines CM-200, & MasPar MP-1
N B MacDonald EPCC-TR92-18, University of Edinburgh, March 1992.